Custom Design Static Timing Analysis Engineer, Silicon

Minimum qualifications:

• Bachelor's degree or equivalent practical experience.
• 2 years of experience in developing and maintaining STA constraints and scripts.
• Experience working on a team of DFT engineers, working with Register-Transfer Level (RTL) and Physical Designer Engineers.
  

Preferred qualifications:

• Bachelor's degree or Master's degree in Electrical Engineering or Computer Science or equivalent practical experience.
• 6 years of experience in Static Timing Analysis with exposure to mixed signal design.
• Experience in flow methodology and development.
  
• Experience in coding using perl, python, tcl scripting languages.
• Excellent problem-solving and decision-making skills.

Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

• Develop and maintain Static Timing Analysis (STA) and flow methodologies.
• Develop flow for custom/Analog and Mixed Signal (AMS) IP collateral all view generation and QA checks.
• Ensure timing closure for Place and Route (PnR) blocks.
• Ensure time constraint development/validation.