CPU Logic Design Engineer, Google Cloud, PhD, University Graduate, Start 2025

Minimum qualifications:

• PhD degree Electrical Engineering or Computer Science, or equivalent practical experience.
• Experience digital logic at Register Transfer Level (RTL) level using SystemVerilog or VHDL.

Preferred qualifications:

• Experience in Design/microarchitecture.
  

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

• Contribute to CPU frontend designs, emphasizing on microarchitecture and RTL design for the next generation CPU.
• Propose performance enhancing microarchitecture features with efficiency in mind. Work with architects and performance teams for trade-off studies. Communicate pros and cons of microarchitecture enhancements. Facilitate final decision making.
• Deliver designs meeting Power, performance, and area (PPA) goals with production quality.
• Become familiar with techniques for at least one processor functional block. Interpret the techniques into design constructs and languages in order to provide guidance to and participate in the performance modeling effort.