CPU Performance Modeling Engineer, Google Cloud

Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience.
  
• Experience in performance modeling, performance analysis, and workload characterization.
  
• Experience working with general-purpose programming languages (i.e. C++).

Preferred qualifications:

• Master’s degree or PhD in Engineering, Computer Science or other technical related field.
  
• Experience in modern, high-performance CPU/ML architecture and micro-architecture.
  
• Ability and interest to learn other coding languages as needed.
  
• Strong object-oriented, database design, and SQL skills.

In this role, you will work with system teams and the CPU Architecture team to develop an understanding of the CPU, SoC, performance metrics, benchmarks/measuring tools, and available optimization knobs. You will define methods and technologies to model CPU performance at different accuracy levels by supporting architectural explorations and decision-making. In addition, you will correlate performance projections with measured post-silicon data.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

• Be part of a team to verify complex digital design blocks at subsystem level or full chip level by fully understanding the design specification and interacting with design engineers to identify key verification scenarios.
• Create and enhance constrained-random verification environments using UVM SystemVerilog or create complex multi core based C tests using reusable C test libs.
• Identify and write all types of coverage measures for stimulus and corner-cases.
• Debug tests with design engineers to deliver functionally correct design blocks.
• Close coverage measures to identify verification holes and to show progress towards tape-out.