Staff Software Engineer, ML Compilers, Tensor Processing Unit

Minimum qualifications:

• Bachelor’s degree or equivalent practical experience.
  
• 8 years of experience in testing, and launching software products.
• 5 years of experience with software development in one or more programming languages (e.g., Python, C, C++).
• Experience in performance analysis and optimization, including system architecture, performance modeling, benchmarking, machine learning infrastructure, or other similar experience.

Preferred qualifications:

• Master’s degree or PhD in Engineering, Computer Science, or a related technical field.
  
• 3 years of experience working in a complex, matrixed organization, including technical leadership role leading project teams and setting technical direction.
• Experience with state-of-the-art ML compilers and their internals, and writing compiler optimization passes.
• Experience with debugging correctness and performance issues at all levels of the ML Software stack.
• Familiarity with accelerator Hardware architectures (TPUs/GPUs).

Google's software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. Our products need to handle information at massive scale, and extend well beyond web search. We're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to Google’s needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. We need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward.

Our team builds the Accelerated Linear Algebra (XLA) compiler which enables TPUs, custom designed processor, to accelerate machine learning and other scientific computing workloads for both internal Google customers and external Cloud customers. In this role, you will support new workloads, optimize for new models and new characteristics, as well as support new TPU hardware across multiple generations. You work on a state-of-the-art TPU compiler with opportunities to work up and down the compiler stack, as well as on end user ML models and on Hardware/Software co-design.

Google Cloud accelerates every organization’s ability to digitally transform its business and industry. We deliver enterprise-grade solutions that leverage Google’s cutting-edge technology, and tools that help developers build more sustainably. Customers in more than 200 countries and territories turn to Google Cloud as their trusted partner to enable growth and solve their most critical business problems.

The US base salary range for this full-time position is $189,000-$284,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target salaries for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.

• Contribute to the compiler for a novel processor designed to accelerate machine learning workloads. Compile high-performance implementations of operations at a distributed scale.
• Design and implement new compiler passes that extract more performance out of current and next generation TPUs, impacting fleet efficiency.
• Work closely with hardware designers to co-design future processors, and invest in high-level representations to effectively program large-scale, distributed, and heterogeneous systems.