ASIC Physical Design Engineer - Bitcoin Mining

Block is one company built from many blocks, all united by the same purpose of economic empowerment. The blocks that form our foundational teams — People, Finance, Counsel, Hardware, Information Security, Platform Infrastructure Engineering, and more — provide support and guidance at the corporate level. They work across business groups and around the globe, spanning time zones and disciplines to develop inclusive People policies, forecast finances, give legal counsel, safeguard systems, nurture new initiatives, and more. Every challenge creates possibilities, and we need different perspectives to see them all. Bring yours to Block.

The Role

We believe everyone should be able to participate and thrive in the economy. We believe bitcoin plays an essential role in the future of payments and the world’s economy. We believe that the status quo of bitcoin mining does not serve the mission of the bitcoin ecosystem. So we’re building a bitcoin mining rig powered by a Block designed ASIC. With our mining rig, we can address many issues such as the concentration of hardware supply in certain countries and incompatibility with clean energy sources.

As the ASIC Physical Design Engineer on our Bitcoin Data Mining team, you will work closely with other digital designers and mixed signal designers to develop the next generation of mining ASIC in 3nm. In particular, the challenges of block level physical implementation, timing, integration, assembly and physical verification are critical parts of this role. 

We are a distributed team across the U.S. and Canada, but have preference for our ASIC Design Engineers to be based close to Toronto where our Hardware Lab is located. 

You Will

• Block level P&R, and integration from early RTL to final tapeout
• Work closely with logic designers on block level timing closure
• Manage interactions with standard cell development and frontend owners
• Improve capacity and scalability of our full chip design flows
• Develop scripts to enhance current physical design infrastructure/methodology
• Collaborate with teammates from different functions and time zones

You Have

• 5+ years of relevant experience with BSEE or Applied Science degree 
• Understanding of the full design cycle from RTL to GDSII, including chip level
• Successfully tapped out multiple chips in 5nm and below
• Experience with all aspects of block delivery including clock, power analysis, physical verification, etc.
• Strong Python/Perl/shell/tcl skills
• Experience with Linux and or Unix and text editors
• Understanding of timing constraints and timing reports
• Ability to work effectively in a fast-paced and rapidly changing start-up environment
• Excellent communication skills

Even Better

• ICC2 and Fusion Compiler
• Semi-custom implementation and relative placement

We’re working to build a more inclusive economy where our customers have equal access to opportunity, and we strive to live by these same values in building our workplace. Block is an equal opportunity employer evaluating all employees and job applicants without regard to identity or any legally protected class. We also consider qualified applicants with criminal histories for employment on our team, and always assess candidates on an individualized basis.

We believe in being fair, and are committed to an inclusive interview experience, including providing reasonable accommodations to disabled applicants throughout the recruitment process. We encourage applicants to share any needed accommodations with their recruiter, who will treat these requests as confidentially as possible. Want to learn more about what we’re doing to build a workplace that is fair and square? Check out our I+D page.

Block will consider qualified applicants with arrest or conviction records for employment in accordance with state and local laws and “fair chance” ordinances.