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Google Deepmind

Software Engineer: Hardware Architecture Modeling Engineer

🌎

Mountain View, California, US

16h ago
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Job Description

At Google DeepMind, we value diversity of experience, knowledge, backgrounds and perspectives and harness these qualities to create extraordinary impact. We are committed to equal employment opportunities regardless of sex, race, religion or belief, ethnic or national origin, disability, age, citizenship, marital, domestic or civil partnership status, sexual orientation, gender identity, pregnancy, or related condition (including breastfeeding) or any other basis as protected by applicable law. If you have a disability or additional need that requires accommodation, please do not hesitate to let us know.

 

About us

Artificial Intelligence could be one of humanity’s most useful inventions. At Google DeepMind, we’re a team of scientists, engineers, machine learning experts and more, working together to advance the state of the art in artificial intelligence. We use our technologies for widespread public benefit and scientific discovery, and collaborate with others on critical challenges, ensuring safety and ethics are the highest priority.

 

About you

We seek out individuals who thrive in ambiguity and who are willing to help out with whatever moves silicon and system architecture forward. We regularly need to invent novel solutions to problems, and often change course if our ideas don’t work out, so flexibility and adaptability to work on any project is a must.

 

The Role

We are seeking a talented and highly motivated hardware architecture modeling engineer to join our GenAI technical infrastructure research hardware team. You will have the opportunity to partake into cutting-edge architecture exploration that will shape the future of ML Model inference acceleration. 

Responsibilities:

  • Develop RTL implementations that meet ambitious power, performance and area goals. 
  • Work on high level ML Model workload characterization and benchmarking.
  • Conduct performance and power analysis and evaluate proposals.
  • Develop architectural and microarchitectural cost-models to enable quantitative analysis.
  • Collaborate with partners in ML model development, simulation environment SW development, hardware and architecture design, and various research teams for effective co-optimization.
  • Represent HW architecture in the simulation environment development and contribute as a developer-user.
  • Propose and drive improvements to simulation tooling, ML models and HW architectures.

Minimum Qualifications:

  • Bachelor's degree in Computer Science, Electrical Engineering or related field, or equivalent practical experience.
  • 5 years of experience with software development in one or more programming languages, and with data structures/algorithms.
  • 3 year work experience from analytical and/or event-driven high level simulation environments.
  • Working experience developing with C++ & Python.
  • Knowledge of high performance and low power architectures for ML acceleration.

Preferred Qualifications:

  • Knowledge of Intermediate Representations (IR) used in ML (e.g. CIRCT, MLIR etc).
  • Understanding of LLM sharding/partitioning and implications to the HW architecture.

 

The US base salary range for this full-time position is between $161,000 - $245,000 + bonus + equity + benefits. Your recruiter can share more about the specific salary range for your targeted location during the hiring process.

Application deadline: 12pm PST Wednesday 15th January 2025

Note: In the event your application is successful and an offer of employment is made to you, any offer of employment will be conditional on the results of a background check, performed by a third party acting on our behalf. For more information on how we handle your data, please see our Applicant and Candidate Privacy Policy.

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