Senior Silicon Design Verification Engineer, Security

Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
• 5 years of experience with verification methodologies and languages such as UVM and System Verilog.
• Experience developing and maintaining verification testbenches, test cases, and test environments.

Preferred qualifications:

• Experience with low power, debug, performance verification and use cases verification.
• Experience with Security IP and subsystems.
• Experienced in ARM or RISC-V CPU based subsystem verification.

Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

• Work with designer, architects and other stakeholders to come up with detailed test plans, dependencies and deliverables.
• Plan the verification of security design blocks by fully understanding the design specification, security requirements and interacting with architecture and design engineers to identify important verification scenarios.
• Create and enhance constrained-random verification environments using System Verilog and UVM.
• Be the primary point of contact for functional verification of the IP for cross-functional teams.