Senior SoC Power Engineer, Google Cloud

Minimum qualifications:

• Bachelor's degree in Computer Science, Electrical Engineering, or a related technical field, or equivalent practical experience.
• 8 years of experience with power modeling, power delivery, and power distribution network/design.
• Experience in power estimation and optimization flows and tools.
• Experience with Vector based Physical Design Power Tools (e.g. PTPX Prime power).

Preferred qualifications:

• Experience with power optimization techniques (multi Vth/power/voltage domain design, clock gating, power gating, DVFS/AVS, etc.) and power management.
• Experience with scripting languages (i.e., Python, Perl, TCL or Bash).
• Knowledge of the impact of software and architectural design decisions on power and thermal behavior of the system (thermal mitigation and scheduling, cross-layer policy design).
• Knowledge of system software components (i.e., Linux, drivers, runtime performance analysis, etc.).

As a SoC Power Engineer in Google Cloud, you will be part of the server chip design team. Power related flows across the chip development end to end.

You’ll have the opportunity to impact the Google Cloud Infrastructure, combine the latest innovations in algorithms and integrate circuits to create CPU SoC solutions for Google Cloud. You'll partner with hardware, software, and data center controls teams to provide silicon and technology roadmaps.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

• Develop methodology of SoC roll up of power reduction, projection, configuration, test plan and tools.
• Work intact with Architecture, Frontend and Backend teams driving power reduction features (both logic and circuit).
• Support power delivery and packaging teams with simulations and scenario definitions.
• Work intact with Architecture and DV to define power scenarios and tests, debug, and integrate into the flow.
• Track power goals are met throughout execution.