In this role you will: - Architect Analog/Mixed-Signal circuit blocks, and conduct transistor-level feasibility studies. - Design, verify, document, and review Analog/Mixed-Signal blocks throughout the design cycle. - Supervise Analog/Mixed-Signal layout implementation and mask design. - Verify, document, and review post-layout performance. - Run post-layout and top-level simulations and verify top-level integration. - Define test plans for silicon validation and production. - Collect lab measurements to establish performance and specification compliance. - Review test results and yield data for debugging and design correlation and provide design mitigations.
Minimum Qualifications
Minimum Qualifications
BS with 3+ years of relevant experience required.
Strong track record in delivering silicon IPs with complete architecture, design, verification, and validation experience.
Strong knowledge and analytical understanding of Analog/Mixed-Signal design including high precision techniques and process variation mitigation.
Hands-on experience in and in-depth understanding of variety of fundamental Analog/Mixed-Signal circuits such as Bandgaps, Bias generation, Op-Amps, Switched-cap circuits (amplifier, filter, mixer, etc.), LDOs, low power Oscillators, PLLs, VGAs, Feedback and compensation techniques, Data converter architectures, etc.
Experience in design for ESD compliance and safety.
Strong device physics knowledge as it applies to analog IC design.
Hands-on experience in using spectrum analyzers, oscilloscopes, signal generators, etc. for design validation.
Experience in one or more of Matlab/Python/VerilogA modeling/C.
Key Qualifications
Key Qualifications
Preferred Qualifications
Preferred Qualifications
Masterβs Degree or PhD Degree with 3+ years relevant work experience.
Experience in chip integration and Analog/Mixed-Signal system definition with hands-on collaboration with Physical and Digital Design teams.
Experience in top level verification methods incorporating block level schematics and behavioral models.
Experience in silicon productization with hands-on collaboration with production test engineering.