As a CPU Physical Design Engineer you will drive or participate in the following: - Drive RTL-to-GDS design convergence through logic synthesis and place-and-route tools targeting ambitious PPA goals - Will be responsible for block-level physical design delivery along with closure of backend flows, electrical requirements and improving silicon yield - Will work closely with internal CAD and PD methodology teams on industry standard synthesis/PNR tool features and optimizations and their adoption in CPU design - Will work with x-functional top-level teams on the aspects of CPU floorplan, timing, power, reliability, and testability - Will work closely with custom IP teams to define and co-optimize memory macros, library standard cells to improve design PPA