Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  
• 8 years of experience with validation content development using C/C++, IP/Soc characterization, debug tools and automation using scripting languages such as Python.
  
• Experience working with Multimedia IP (Display Processing Unit, mipi Display Serial interface, Display Port, Graphics processing unit, Image signal processor).
  

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
  
• Experience with debug tools like protocol analyzers, oscillocope, Jtag debugger.
  
• Experience with emulation platforms, FPGAs or silicon bring up.
  
• Familiarity with power or performance measurement of SoCs.
  
• Familiarity with Display concepts (Display processor) and interfaces Display Serial Interface (DSI), DisplayPort (DP).
  

Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

• Analyze the PRD, micro architecture document, create validation plan, develop content and execute to validate Display IP and integration at the system level on emulation, Field-programmable Gate Array's (FPGA’s), and the post-silicon environment.
• Work with silicon teams to develop, simulate, and validate goal tests and provide documentation of the pre and post silicon validation tests and ensure it is easy to use.
• Get in-depth knowledge of IP and its integration into SoC to debug using lab tools like display analyzers, oscilloscope and logic analyzers and silicon debug tools (T32).
• Collaborate with cross-functional teams to debug failures (e.g.,Arch, Design, DV, boards, software, manufacturing, thermal issues).
• Work with internal cross-functional teams, external silicon partners, and intellectual property (IP) vendors to functionally validate and parametrically characterize the silicon, including bare-metal, kernel, drivers, and Real-Time Operating System (RTOS).