System Power and Performance Architect, Silicon

Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
• 3 years of experience in SoC architectures and performance and power KPIs.
• Experience in software power optimizations (e.g., Android, Linux).
• Experience with Python or C++.

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science.
• Experience with Camera and Generative AI workloads and data flows.
• Experience with use case datapaths, IP-level and SoC-level performance KPIs, and power management concepts.
• Experience with post-si power productization work.
• Knowledge of the impact of software and architectural design decisions on system performance, power, and thermal behavior.

Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

• Architect and drive low power solutions for Google Tensor mobile SoCs to optimize Power-Performance-Area (PPA) under battery life and thermal constraints.
• Create use case workload and datapath models in simulator for use case power, performance, thermal and days-of-use evaluation to drive hardware and software architecture definitions.
• Define power/performance KPIs, set SoC/IP-level power/performance goals, guide cross-functional teams to achieve these goals, perform use case level power roll-ups, and track KPIs through the design cycle.
• Drive power-performance trade-off analysis to guide product roadmap and feature decisions.
• Perform post-silicon power and performance characterization in both qualitative and quantitative fashion, and guide cross-functional teams to land power/thermal goals in production.